
Bluespec strongly supports EDA standards, as they benefit both EDA customers and vendors.
Standards evolve over time, continuously incorporating previously non-standard extensions. Innovations begin as non-standard extensions, and become candidates for standardization when they have acquired broad-based acceptance and support. Bluespec, like other companies committed to standardization, fully endorses this process for its innovations.
Since last year, the standardization of version 3.1a has been shifted to IEEE. Bluespec is an active member of IEEE’s hardware design language standardization efforts, including the IEEE P1800 (SystemVerilog) standard.
Bluespec joined SPIRIT, the industry’s new initiative for IP re-use.
A fundamental second dimension to promoting standards involves interoperability. There are two aspects to Bluespec’s interoperability work: partnerships and flow testing.
To date, Bluespec has partnered with the following companies, enabling access to their solutions for use in flow testing: Synopsys, Cadence, Mentor, Magma, Verisity, and Novas.
Bluespec performs extensive flow testing between its solution and others, along the following dimensions: Simulation, RTL synthesis, and HDL analysis with its generated Verilog RTL, co-simulation with both Verilog and SystemC with its simulator of C-models, and debugging with its generated VCD output.
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