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SOC Architecture High-level modeling is essential for success during the development of today’s complex SOCs. Specifications should be accurately modeled and thoroughly evaluated before implementation. C/C++/SystemC have been the default modeling languages. But they are weak at modeling hardware architecture and concurrency and they are not generally synthesizable. Consequently, they take too much time to develop, fall short on accuracy, and cannot run in emulators to fix simulation bottlenecks. Bluespec provides the only solution that closes the gap between models and RTL implementations. Bluespec synthesizable virtual platforms interoperate with RTL and allow high-speed emulation at all stages of development.
Bluespec Solutions for SOC Architecture
With the Bluespec ARM Synthesizable Virtual Platform, you can integrate and run your ARM IP in an ARM SOC model, including Linux at MHz speeds. Explore and validate architectures early. Develop firmware that works with your ARM IP model. And, if you start with a model of your ARM-based IP developed using BSV, you can easily and quickly refine your ARM IP model into a high-quality implementation. Firmware Development Based on Bluespec’s powerful Synthesizable Virtual Platform (SVP) technology and Processor System Models, our Firmware Development Solution brings true accuracy and performance to the front end of the design cycle. Bluespec’s Firmware Development solution enables working and tested Firmware in time for first silicon arrival. Currently Bluespec is delivering an ARM9 v5 based complete solution. Additional models and capabilities are under development. Synthesizable Virtual Platforms for power & performance modeling Bluespec’s powerful Synthesizable Virtual Platform (SVP) technology and Processor System Models bring true accuracy and performance to the front end of the design cycle. Because they are 100% synthesizable while still running at 10s of MHz speeds in emulation, Bluespec SVPs can be seamlessly run with RTL models without sacrificing speed or accuracy. Integrate and validate RTL models. Develop firmware well before silicon is available. Validate system power architectures, performance and specs. Currently Bluespec is delivering an ARM9 v5 based complete solution. Additional models and capabilities are under development. Architectural Modeling The more you add architectural accuracy and detail with C/C++/SystemC, the harder it gets. And the more you do, the slower are your simulations. Bluespec atomic transactions make it much easier to express hardware architecture and complex concurrency – and because everything is 100% synthesizable, you can run your models in emulation side-by-side with RTL. Express architectural models faster, run them faster, and explore architectures faster.
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