Other Approaches

There are many attempts currently in progress both in research and commercially to develop a "higher-level language" for hardware design and modeling, going beyond SystemVerilog/Verilog/VHDL. Many of them are based on C/C++ or some other abstract language definition. Here is why we think the Bluespec approach can deliver where others have not:

• With a solution based on SystemVerilog, the Bluespec design environment is very natural and familiar for describing hardware, whether for modeling or implementation. In contrast, the execution model of traditional programming languages like C and C++ are very distant from hardware, making it harder to compile good hardware and making it harder for designers to retain their intuitions about the relationship between source code and good hardware.
 
• Bluespec is unique in using atomic transactions as its semantic model of hardware.  Atomic transactions are by far the single most powerful tool for managing complex concurrency. Their scalability enables the synthesis of large designs, without being swamped in state explosions and race conditions.  In contrast, the concurrency models of RTL and SystemC require detailed, nitty-gritty management of shared resources.  Control complexity has exploded and Bluespec is the only approach with a solution.
 
• Attempting to synthesize architecture from a high-level behavioral model is an intractable problem. No matter how good the software, it is no substitute for a hardware engineer’s intuitions regarding the top level architecture and design choices. In Bluespec, all state elements are explicitly defined by the designer. We automate hardware generation, not micro-architecture choices.

• Bluespec has a single environment spanning modeling, architectural exploration, verification and implementation.