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Proven Technology

Based on over six years of commercial development and eleven years of research at MIT, Bluespec’s patented, silicon-proven technology is built on three core elements:

• Atomic Transactions
• Control-Adaptive Parameterization
• SystemVerilog

Simplifying Complex Concurrency with Atomic Transactions

Atomic transactions are by far the single most powerful tool for managing complex concurrency. Complex concurrency is dramatically simplified by atomic transactions. As design size increases, complexity grows linearly, rather than exponentially, when using atomic transactions instead of traditional approaches.

Atomic transactions are leading the charge as a central component of next generation programming languages for multi-core and future parallel hardware architectures. Atomic transactions for hardware are at the core of our technology – and Bluespec is the only company delivering such a solution for hardware modeling, verification and design.

Atomic transactions are used to describe behavior. They encapsulate related actions in a single, indivisible transaction that behaves within a system as though it is the only thing active – so engineers can treat resource accesses as though they are not shared by other operations within the system. By specifying each operation with an atomic transaction, designers, verification eingeers and modelers can express behavior operation-centrically, like an executable specification – it also lets them reason about and describe each operation as an isolated behavior. And, engineers avoid the low-level, manual management of shared resources as well as any associated race conditions.

Because RTL and SystemC require detailed, hands-on management of shared resources, atomic transactions provide a much higher level of abstraction for concurrency than either of these traditional approaches.

Atomic transactions enable:
Rapid changes so that you can add features incrementally, explore micro-architectures quickly and make changes quickly
Operation-centric design without manual coordination of shared resources, the primary source of complexity in concurrent design

Bluespec’s compiler technology performs hardware synthesis to RTL where it maximizes the concurrency of atomic transactions. This enables the power, performance and area results of hand-coded RTL, but with a significantly higher level of abstraction, succinctness and flexibility.

With Bluespec, you think architecture, but design models, testbenches and implementations much, much faster and with many fewer bugs.  And everything is synthesizable!

Delivering Extreme Reuse with Control-Adaptive Parameterization

Tightly interwoven with atomic transactions, Bluespec’s control-adaptive parameterization enables flexibility and auto-generation on a scale previously unfathomable. With Bluespec, you can parameterize a design, testbench or model with:


• Different micro-architectures just based on parameter values such as different degrees of pipelining, different degrees of data-parallelism and reuse (‘degrees of unfolding’, e.g.)
• Different algorithms, arbitration schemes, or functions through parameterized modules and functions. As an example, you could simply build a single sorting queue parameterized by the type of data, whether it’s pipelined, and the sorting algorithm
• Different interfaces
• Data types, including structures, elements and widths

Extreme parameterization is unleashed by resting on a substrate of atomic transactions. Whereas parameterization in hardware design has historically been used only in minor ways (for example, to specify the size of a register or a FIFO or a RAM), parameterization can now for the first time be used in a control-adaptive manner, where a different choice of parameters can actually result in a dramatically different micro-architecture, with automatic generation of the appropriate control structures for that micro-architecture. Bluespec’s 'atomic transactions' automate the changes in control logic that are implied by every refinement, every change, even every micro-architectural change.

Building on Mainstream Technologies

Bluespec delivers these capabilities by wrapping atomic transactions and control-adaptive parameterization inside a modern, advanced language, SystemVerilog. In addition to those features discussed above, toolsets include many capabilities including:

• Powerful synthesis, capable of both datapath and complex control logic generation
• Strong static verification, including expressive types with polymorphism
• Large foundation library of design building blocks, functions, types and interfaces

The combination of Bluespec technology and SystemVerilog permits the Bluespec designer to express very complex hardware structures succinctly and robustly, and still produce optimal, efficient RTL code. In conjunction with simple and clean semantics, the Bluespec tools can assess program correctness and transform programs systematically from specifications to RTL.

The work of Professor Arvind, Johnson Professor of Computer Science and Engineering at the Massachusetts Institute of Technology, laid the foundations for Bluespec.

 

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