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Bluespec high-level synthesis is turbocharged with the industry's only hardware concurrency abstraction above RTL, for bridging all types of designs into RTL:
  • Models, transactors, test benches & implementations
  • Complex control, system interconnect & algorithms
And, it provides 100% architectural transparency for fast, predictable architectural exploration and optimization of power, performance and area.

Learn more about Bluespec technology...

WHITE PAPER: Case Study
Using Synthesizable Transactors & Testbenches to Avoid Emulation Performance Disasters
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WHITE PAPER / WEBINAR REGISTRATION

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ON-DEMAND WEBINAR
Designing Synthesizable Transactors and BFMs
May 7, 2012:
ARM, MIPS, x86, PowerPC, SPARC, Alpha & Itanium microprocessor models, most booting real OSes

March 2, 2012:
CONNECT: Configurable NoC Generator

February 21, 2012:
Bluespec User Group Meeting in Japan: Pictures

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