
"With less than a week of training, we were able to significantly accelerate design and with much fewer bugs. I completed the design much faster than we did with the original Verilog RTL design. It fully passed our comprehensive regression suite, met timng, and had 30% fewer gates than the original.
"Providing the engineer full control of architecture through to synthesized RTL, Bluespec enables rapid exploration of different architectures to quickly obtain an optimal, functionally correct implementation.
"Bluespec is the future of design."
Senthil Krishnamoorthy, Principal Engineer, Aarohi Communications, Inc.
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Differentiating Bluespec tools from every other modeling and design solution on the market, Bluespec keeps the designer 100% in control of the architecture and micro-architecture for optimal results – despite raising the level of abstraction for concurrency significantly above SystemC and RTL. This is made possible by the core enabling technology: atomic transactions, by far the single most powerful tool for managing complex concurrency. Atomic transactions greatly simplify complex concurrency, particularly for control, improve communication between modules, and elevate the description and synthesis of control and complex datapaths.
Used by the world’s leading semiconductor and systems companies, Bluespec's silicon-proven high-level synthesis tools for ASICs and FPGAs enable fast modeling, architectural exploration, prototyping and emulation, and system and IP design.
With a much more effective approach to high-level design, Bluespec's toolsets deliver ESL synthesis without the compromises inherent in previous solutions. Bluespec delivers the following products:
- Bluespec Compiler (BSC) – compiles a high-level model, transactor, testbench or implementation into Verilog RTL or SystemC
- Bluespec Simulator (Bluesim) – simulates Bluespec designs with high-speed cycle-accuracy
- Bluespec Development Workstation (BDW) – provides a high-level GUI-based development environment for the design, analysis and debug of Bluespec designs
- AzureIP Foundation Library – streamlines design with a rich IP library of design building blocks, interfaces, and types, highly parameterized and full of capabilities more advanced than possible in existing design
- SCE-MI Infrastructure and Generator – provides fast bringup of HW/SW co-emulation with a highly flexible, portable SCE-MI implementation
- Desktop Emulation – accelerates simulation by orders of magnitude with pre-built kits for running software-based testbenches against unit designs running on low-cost FPGA boards
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